The present invention relates to control of an access to a memory.
Data on the memory have hitherto been protected by, e.g., a parity check. The parity check is, though capable of detecting an error, incapable of correcting the error. Such being the case, the data of which an error is detected are invalidated on the memory, and data containing no error are read afresh from a data source. According to this method, an access time is delayed to a great degree due to the error correcting process. Further, the case of having detected the error entails the control that the data be invalidated and the error be reported, wherein the logic becomes intricate.
On the other hand, for example, an ECC (Error Check Code)-utilized error correcting circuit is known as an error correcting mechanism on the memory. This error correcting circuit does not require such a troublesome procedure as to invalidate the data and read the data afresh. In the case of using the error correcting circuit, however, the data read from the memory undergo an execution of the error detection and error correction and, after removing the error from the data, undergo an execution of the essential processing.
As explained above, there have been proposed a multiplicity of techniques for protecting the data on the memory. The memory access time is delayed by utilizing the data protection technique described above. This delay is a serious problem especially in a cache memory that needs high-speed accessing.